Gothenburg, Sweden. Frontgrade Gaisler, under contract with the European Space Agency (ESA), is developing an innovative RISC-V processor designed to adhere to the strict requirements of microcontrollers for the space industry. As an open instruction set architecture (ISA), RISC-V’s intrinsic configurability and efficacy delivers the ideal base to move forward within critical sectors of space computing environments.

The last time we spoke with Sandi Habinc, General Manager, and Jan Andersson, Director of Engineering at Frontgrade Gaisler, we were discussing the TRISAT-R CubeSat and Gaisler’s use of RISC-V’s open standard instruction set architecture within its space deployment.