Frontgrade Gaisler Developing Innovative RISC-V Ecosystem to Further Space Exploration
May 15, 2024
News
Gothenburg, Sweden. Frontgrade Gaisler, under contract with the European Space Agency (ESA), is developing an innovative RISC-V processor designed to adhere to the strict requirements of microcontrollers for the space industry. As an open instruction set architecture (ISA), RISC-V’s intrinsic configurability and efficacy delivers the ideal base to move forward within critical sectors of space computing environments.
"Frontgrade Gaisler has decades of experience supplying the space industry with products that implement open standards, and now we’re applying our proven know-how to bring RISC-V advancements to the space industry," said Sandi Habinc, General Manager at Frontgrade Gaisler. “Our team is committed to providing tangible benefits that help progress and grow the entire space community and enable new types of space missions.”
Engineers are concentrating on fixed management with marginal latency. The new RISC-V processor IP will have the ability to predictably and reliably execute tasks and respond swiftly to input stimuli, facilitating its integration into radiation-hardened microcontrollers and FPGAs for space exploration.
According to Frontgrade Gaisler, its new model will further develop the RISC-V ecosystem and complement the NOEL-V RISC-V processor, which shares the focus on space applications with an emphasis on high-performance capabilities.
“Building on over 25 years of successfully using the SPARC open ISA in space, this effort is an important step forward in the transition to the emerging and equally open RISC-V architecture,” said Roland Weigand, Technical Officer at ESA. “RISC-V is the preferred architecture across a wide range of space products, from microcontrollers to advanced SoC-FPGAs and high-performance microprocessors for on-board data processing.”
For more information visit frontgrade.com.