Tewksbury, MA – January 25, 2023 –  Avery Design Systems and CoMira Solutions are partnering to enable chiplet design using the UCIe (Universal Chiplet Interconnect Express) die-to-die interface standard, announced earlier this year, to provide interoperable chiplets and support an open chiplet ecosystem and universal interconnect at the package level.

Avery Design Systems announced comprehensive support for the new UCIe (Universal Chiplet Interconnect Express) standard, allowing design and verification engineers to take advantage of the recently introduced standard for die-to-die interface connectivity. Avery's offering includes high-quality models and test suites for UCIe-based system pre-silicon verification.

Rambus uses Avery HBM3 memory model to verify its HBM3 PHY and Controller Subsystem