Lattice Releases MachXO5T-NX Advanced System Control FPGAs

By Chad Cox

Production Editor

Embedded Computing Design

April 27, 2023

News

Lattice Releases MachXO5T-NX Advanced System Control FPGAs
Image Credit: Lattice

Hillsboro, Oregon. Is the complexity of your growing system management becoming too much? Lattice Semiconductor released its low power Lattice MachXO5T-NX family of advanced system control FPGAs to support users as they face the tough challenges of building their system management environment. The MachXO5T-NX FPGAs features PCIe Gen 2 interfaces, advanced logic, added memory, and heightened security.

“As the pace of technological innovation accelerates and system management designs become more complex, the need for advanced processing capabilities increases,” said Dan Mansur, Vice President, Product Marketing, Lattice Semiconductor.

The FPGAs include upwards of 291 common I/Os including support for previous I/O configuration.  The series features 1.25 Gbps SGMII, default pull-down, hot socketing, and programmable slew rate for streamlined board design. Increased logic and memory consist of 3.4X more embedded memory (7.2 Mb), 100X more dedicated user flash memory (57 Mb), 100X lower soft error rate than conventional FPGSs.

Security Features:

  • On-chip multi-boot with bitstream encryption (AES256) and authentication (ECC256).
  • Run-time security capabilities not currently available in competitive FPGAs of a similar class.

“Lattice MachXO5T-NX FPGAs equip our customers with more capacity, faster I/O, and enhanced security features in the low power, small size envelopes to help them simplify system integration while maintaining power efficiency, compatibility, and performance,” continued Mansur.

For more information, visit Lattice MachXO5T-NX

Chad Cox is the Production Editor at Embedded Computing Design. His responsibilities are centered around content creation, writing and editing, and article research and development. Chad covers industry news and events and is known to interact with various industrial leaders via on-premise visits and online interviews. He is responsible for the digital footprint and dissemination of news via social media posts, advertising creation and the production of newsletters including the Embedded Computing Design’s Daily.

He is well versed in many facets of industrial computing including Edge AI, IoT, Processing, Security, Open Source, and more.

Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature and holds a master’s in education.

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