IAR Systems and Codasip Collaborate to Enable Low-Power RISC-V-Based Applications
November 30, 2021
News
IAR Systems and Codasip announced their partnership enabling joint customers to build low-power embedded applications based on RISC-V. Following this, version 2.11 of IAR Embedded Workbench for RISC-V now supports the L30 and L50 processors from Codasip.
The L30 and L50 are small and energy-efficient low-power embedded processor cores from Codasip, fully customizable and adaptable to the distinct needs of a project.
IAR Embedded Workbench for RISC-V is a complete C/C++ compiler and debugger toolchain, providing the tools embedded developers need integrated in one single IDE. Through its optimization technology, IAR Embedded Workbench for RISC-V is designed to help developers ensure the application fits the required needs and optimizes the utilization of on-board memory.
Both Codasip and IAR Systems are participating in the RISC-V Summit 2021 which is collocated with the 58th Design Automation Conference (DAC) in San Francisco, California, on December 6-8, 2021.
More information, visit: www.iar.com/riscv or www.codasip.com.
Tiera Oliver is the assistant managing editor at Embedded Computing Design. She is responsible for web content editing, product news, and story development. She also manages, edits, and develops content for ECD podcasts, including Embedded Insiders.
She utilizes her expertise in journalism and content management to oversee editorial content, coordinate with editors, and ensure high-quality output across web, print, and multimedia platforms. She manages diverse projects, assists in the production of digital magazines, and hosts company podcasts by conducting in-depth interviews with industry leaders to deliver engaging and insightful discussions.
Tiera attended Northern Arizona University, where she received her bachelor's in journalism and political science. She was also a news reporter for the student-led newspaper, The Lumberjack.
