With growing compute requirements and tighter design schedules, semiconductor companies are constantly being tested to deliver both complex functionality and exceptional performance very quickly. Irrespective of where the customer is in their cloud journey, designers need to drive greater productivity and efficiency for complex chip design flows.

With increasing SoC and system complexity, shrinking market windows, and growing engineering resource challenges, anything that can improve chip design productivity—not to mention the associated chip quality—can give you a significant edge over your competitors.

Synopsys announced a critical expansion of its EDA data analytics portfolio with the introduction of Synopsys DesignDash design optimization solution.

From online transactions to streaming videos and big data analytics, data centers are proving to be the workhorses of our smart, connected world. Higher volumes of data coupled with increasingly complex data are causing a shift in data center architectures. A new trend has emerged in data center architectures to address these two underlying forces: data center disaggregation.

Standards like Ethernet, along with the engineers whose dedicated work creates them, enable a myriad of benefits for our digital world. From smartphones to smart home systems and beyond, these devices work as well as they do because of their native compatibility to universal interface standards that support seamless inter-device communication.

Synopsys announced a new cloud-optimized electronic design automation (EDA) deployment model that delivers chip and system design flexibility via a single-source, pay-as-you-go approach.