SmartDV? Technologies
Articles related to SmartDV? Technologies
Debug & Test
SmartDV Adds Support for Verilator Open Source HDL Verilog Simulator - Product
October 23, 2019Available for All SmartDV Verification IP.
Debug & Test
SmartDV Adds Support for Verilator Open Source HDL Verilog Simulator - Blog
October 09, 2019SmartDV? Technologies today announced support for Verilator, the free, open-source hardware description language (HDL) simulator.
Networking & 5G
SmartDV Announces Availability of Ethernet TSN Design IP - Product
September 23, 2019Fully Compliant with Updated IEEE Standard for Time-Sensitive Transmission of Data over Ethernet Networks.
Processing
SmartDV to Demonstrate TileLink Verification IP for RISC-V Based Systems, Smart ViPDebug Protocol Debugger at DVCon India - Product
September 16, 2019Will Highlight Broad Portfolio of VIP for Simulation, Emulation, Formal, FPGA Prototyping and Design IP.
Open Source
SmartDV to Exhibit at OpenPower Summit August 19-20 - Press Release
August 28, 2019Will Feature First Commercially Available OpenCAPI Verification IP.
Networking & 5G
SmartDV Unveils First Verification IP to Support Ethernet TSN - Product
July 29, 2019Verification IP Fully Compliant with Updated IEEE Standard for Time-Sensitive Transmission of Data over Ethernet Networks
Debug & Test
SmartDV Speeds Delivery of its New CXL Verification IP - Press Release
July 15, 2019First Verification IP Available for New Protocol Based on PCIe Infrastructure.