Aldec, Inc.
Solve Design Issues Utilizing ALINT-PRO - News
April 06, 2023Henderson, Nevada. Aldec, renovated its linting tool ALINT-PRO to increase the support of Microchip Technology's Libero SoC Design Suite. The update allows for automatic conversion of Libero projects into ALINT-PRO’s ecosystem for static linting and clock domain crossing (CDC) evaluation of hardware devices in VHDL, Verilog, or SystemVerilog.
Aldec's TySOM Embedded Development Kits are Now Qualified for AWS IoT Greengrass - Blog
August 13, 2020TySOM boards can be used either as the main edge processing device or as a gateway to AWS.
Aldec Adds Customizable Tool Qualification Data Package to ALINT-PRO for DO-254 Projects - News
July 02, 2020Aldec now offers the complete and customizable qualification package for the Basic Tool Qualification process.
New to Riviera-PRO: VHDL-2019 Support and a UVM Registers Window - News
June 30, 2020Aldec has added VHDL-2019 feature support and a UVM Registers window to Riviera-PRO, the company's simulation and debugging tool.
Aldec's Spec-TRACER Offers Traceability Between System and Hardware Lifecycle Data - News
April 17, 2020The 2020.3 release of Aldec's Spec-TRACER bridges the communication gap between system and hardware development teams by adding integration with IBM Requirements Engineering DOORS Next.
Aldec and Codasip at Embedded World: Showcasing an Integrated UVM Simulation Environment for Verifying Custom Instructions with RISC-V Cores - Press Release
February 25, 2020By integrating Aldec?s Riviera-PRO? with Codasip?s Studio?, verification of custom instructions at the RTL implementation level becomes an incredibly powerful platform for RISC-V processor deployment.
Aldec Enhances Riviera-PRO's VHDL and UVVM Support - News
December 19, 2019Riviera-PRO 2019.10 is now available for download and evaluation.