MASTECS Develops Certification-Ready Multicore Timing Analysis Solution

By Tiera Oliver

Associate Editor

Embedded Computing Design

March 07, 2022

News

MASTECS Develops Certification-Ready Multicore Timing Analysis Solution

The first certification-ready timing analysis solution capable of handling the complexity of multicore processors, will be used by the European industry to support advanced critical software development and certification.

The MASTECS project, (Multicore Analysis Service and Tools for Embedded Critical Systems) has developed the first certification-ready timing analysis solution capable of handling the complexity of safety-critical multicore systems. The technology developed and consolidated within the project is now enabling the use of multicore processors in aerospace and automotive domains.

The project helped to develop tools and methods that support both the avionics and automotive domains, which both have a strong focus on applicable safety standards and emerging certification requirements.

The multicore timing analysis workflow builds on the use of specialized micro-benchmarks that create interference on multicore processors and demonstrate the possible effect that such interference can have on software. The workflow also features a task contention model that provides early estimates of the contention delay suffered by tasks. A 7-step design methodology was also developed to fully understand and characterize the impact of interference on timing behavior.

The MASTECS project helped to develop a clear methodology for meeting the safety certification requirements in aerospace and automotive using multicore processors for advanced software functions, supporting wider benefits such as:

  • Improving safety in the automotive and avionics domains,
  • CO2 profile reduction for different types of vehicles,
  • New flight technologies, including personal air vehicles making commercial flights and further mobility solutions accessible.

"Despite the pandemic, MASTECS has accomplished its objective of maturing the multicore technology to a state that is now commercially available. This will bring huge benefits to EU companies in domains like avionics and automotive by helping them to adopt multicore processors in their products" says Francisco J. Cazorla, MASTECS Project Coordinator and Operating System group manager at the Barcelona Supercomputing Center (BSC).

Per the company, the MASTECS technology has been evaluated and proven by case studies. These included the use of the technology in Civil Certified Vehicle Management Computer provided by Collins Aerospace Applied Research & Technology (Collins ART) and analysis of a Vehicle Domain Control Module (VDCM) by Marelli Europe, in the avionics and automotive domains respectively.   

For more information, visit: mastecs-project.eu/

Tiera Oliver, Associate Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She also assists with newsletter updates as well as contributing and editing content for ECD podcasts and the ECD YouTube channel. Before working at ECD, Tiera graduated from Northern Arizona University where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student led newspaper, The Lumberjack.

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