SEGGER Releases Floating-Point Library Supporting RISC-V
February 07, 2020
News
SEGGER's stand-alone Floating-Point Library has been extended with an assembly-optimized variant for RISC-V implementations
SEGGER's stand-alone Floating-Point Library has been extended with an assembly-optimized variant for RISC-V implementations, offering a complete set of high-level mathematical functions in C, using advanced algorithms to maximize performance. Verified for single and double precision operations, the RISC-V variant, like the existing variant for ARM, is optimized for both high-speed operation and small code size. The balance between size and speed can be configured at library build time, and the library is also a part of the company’s Runtime Library, already included in its Embedded Studio platform.
