The European Processor Initiative is finishing its first year, and has released an EPI Common Platform and an updated roadmap. Uniting 27 partners from 10 European countries with the goal of helping the EU achieve independence in advanced processor technologies, the initiative has submitted several architectural designs to the European Commission, and is now ready to show its updated roadmap to the public.

The first-generation chip family, named Rhea, will include general-purpose cores based on the Arm ZEUS architecture and prototypes of energy-efficient accelerators: The RISC-V-based EPAC, a Multi-Purpose Processing Array (MPPA), an embedded FPGA (eFPGA), and a hardware cryptography engine. First Rhea chips will be fabricated in N6 technology aiming at the highest processing capabilities and energy efficiency.

The Rhea chips will be integrated into test platforms, both in workstations and supercomputers in order to validate the hardware units, develop the necessary software interfaces, and run applications. Rhea aims to be the European processor for several experimental platforms towards exascale HPC and future automotive designs.

The EPI Common Platform is in early development, but will include the global architecture specification (hardware and software), common design methodology, and global approach for power management and security. The CP in the Rhea family of processors will be organized around a 2D-mesh Network-on-Chip (NoC), connecting computing tiles based on general purpose cores with accelerator tiles.

A common software environment between heterogeneous computing tiles will harmonize the system, acting as a common backbone of IP components for IO connection with the external environment, such as memories and interconnected or loosely-coupled accelerators.

For more information, visit www.european-processor-initiative.eu.