Keysight Delivers Single Vendor Validation Solution to Support PCIe® 5.0 and 6.0
April 06, 2022
News
The rapid increase of AI (artificial intelligence) related workloads in data centers and edge computing demand new compute designs. Data center system designers are challenged to provide higher-speed devices within reduced design cycles. New PCIe devices will need to keep up with Ethernet network interfaces in data centers and the emergence of CXL (compute express link).
To maintain performance goals and prepare for the PCIe 6.0 move to pulse amplitude modulation 4-level (PAM4), customers need a smooth transition from PCIe 5.0 to 6.0, where the integrity of PCIe measurements are backed by leading-edge tools and comply with PCIe specifications. Shrinking design cycles require end-to-end solutions from simulation to validation through the layers of the stack.
To this end, Keysight Technologies, Inc. announced an end-to-end PCIe test solution for digital development and senior engineers that enables the simulation, pathfinding, characterization, validation, and compliance testing of PCIe designs.
Keysight provides a comprehensive physical layer test solution approved by the Peripheral Component Interconnect Special Interest Group (PCI-SIG) to test transmitters and receivers for all generations of the PCIe specification, which is currently supported by the PCI-SIG integrators list. To reflect the increasing time to market pressure for design engineers, Keysight extends the portfolio to cover PCIe protocol, making it the first end-to-end solution from simulation to full stack validation.
The PCIe test solution uses the company's physical layer-system simulation; physical layer interconnect, transmitter (Tx), and receiver (Rx) test; and a new protocol layer test solution consisting of hardware and software products, demonstrated at DesignCon.
The test solution offers:
- Interoperability and support across the entire design cycle from a single vendor.
- A Keysight Infiniium UXR-Series real-time oscilloscope for accurate PAM4 PCIe 6.0 Tx measurements and Rx calibrations to enable low intrinsic noise with 110 GHz bandwidth to provide future proof capabilities.
- Investment protection with the Keysight M8040A Bit Error Ratio Tester (BERT), which utilizes the same hardware for non-return to zero (NRZ) and PAM-4 measurements.
- Signal integrity that enables engineers to focus on protocol bugs rather than interposer signaling issues.
- Fast transmitter phased locked loop (PLL) bandwidth measurements to reduce the measurement time from hours to seconds.
- End-to-end verification of components and sub-systems across the product workflow with common software platforms and built-in test automation capabilities.
For more information, visit Keysight.
