Everything is connected, everything is smart, and AI controls everything. And it all comes back to the “smart Edge.”

While these statements seem to be a bit over-arching, there’s a lot of truth to them. But building and then designing around that smart Edge can be quite tricky. Add TinyML to the equation, and it should become clearer (well, maybe).

To better understand what that means exactly, I spoke to Amir Panush, the CEO of Ceva on this week’s Embedded Executives podcast.

The Embedded Computing Design editorial staff is pleased to present this year’s embedded world Best-in-Show nominees in the Wired & Wireless Connectivity (Including IoT & Industrial) category:

Packing applications into constrained on-chip memory is a familiar problem in embedded design, and is now equally important in compacting neural network AI models into a constrained storage.

Shanghai, China. CEVA announced support for Channel Sounding to its RivieraWaves Bluetooth IP portfolio for precise secured positioning in automotive, industrial, and broader IoT. By supporting Channel Sounding CEVA has surpassed conventional Bluetooth distance and position measurement practices, explicitly received signal strength indicators (RSSI) with angle of signal arrival/departure (AoA/AoD).

Current CEO Gideon Wertheizer to Retire at Year End

• Board Appoints Technology Industry Veteran Amir Panush as CEO Effective January 2023

ROCKVILLE, MD. CEVA, Inc., the leading licensor of wireless connectivity and smart sensing technologies and co-creation solutions, and ASR Microelectronics (ASR), a leading wireless semiconductor company, announced that shipments of ASR wireless IoT chips powered by CEVA’s IPs have surpassed 100 million units. This monumental milestone was achieved in less than 2 years since ASR’s first CEVA-powered chips were introduced.

Flex Logix Technologies and CEVA announced the world’s first successful silicon implementation using Flex Logix’s EFLX embedded FPGA (eFPGA) connected to a CEVA-X2 DSP instruction extension interface.