SiFive Talks RISC-V and AI, Unveils XM Series
September 18, 2024
News
SiFive today announced its new SiFive Intelligence XM Series, which the company says is designed for accelerating high performance AI workloads.
According to the release, this is the first IP from SiFive to include a scalable AI matrix engine that reportedly can accelerate time to market for semiconductor companies building system on chip (SoC) solutions for Edge IoT, consumer devices, electric or autonomous vehicles, and data centers.
At the same time, SiFive also announced its intention to open source a reference implementation of its SiFive Kernel Library (SKL).
These announcements were made at a SiFive press event in Santa Clara, CA, where executives discussed how the company sees RISC-V as a driving force in AI solutions development, and provided an update on SiFive’s strategy, roadmap and business momentum.
The new XM Series offers a scalable and efficient AI compute engine that SiFive says is designed to integrate scalar, vector, and matrix engines to help users take advantage of efficient memory bandwidth in addition to offering high performance per watt for compute-intensive applications.
“RISC-V was originally developed to efficiently support specialized computing engines including mixed-precision operations,” said Krste Asanovic, SiFive Founder and Chief Architect. “This, coupled with the inclusion of efficient vector instructions and the support of specialized AI extensions, are the reasons why many of the largest datacenter companies have already adopted RISC-V AI accelerators.”
As part of his presentation at Tuesday’s event, Asanovic gave more details on the new XM Series. To drive it’s processing power, the XM Series uses four X-Cores per cluster, and a cluster can deliver 16 TOPS (INT8) or 8 TFLOPS (BF16) per GHz. Also, there is 1TB/s of sustained memory bandwidth per XM Series cluster, with the clusters being able to access memory via a high bandwidth port or via a CHI port for coherent memory access, he said.
SiFive will be at the RISC-V Summit North America, taking place Oct. 22-23, 2024 in Santa Clara, CA.
Ken Briodagh is a writer and editor with two decades of experience under his belt. He is in love with technology and if he had his druthers, he would beta test everything from shoe phones to flying cars. In previous lives, he’s been a short order cook, telemarketer, medical supply technician, mover of the bodies at a funeral home, pirate, poet, partial alliterist, parent, partner and pretender to various thrones. Most of his exploits are either exaggerated or blatantly false.
