Application Highlight: ADLINK ISB-W890 Redefines High-End Automated Inspection

By Ken Briodagh

Editor in Chief

Embedded Computing Design

June 09, 2026

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Application Highlight: ADLINK ISB-W890 Redefines High-End Automated Inspection

Automated Optical Inspection (AOI) is at the leading edge of industrial Edge AI systems, and semiconductor production, in particular, relies upon high-end AOI for maximum efficiency in manufacturing.

Advanced semiconductor production is becoming increasingly complex as wafers become thinner and the process is miniaturized. Despite this growing complexity, semiconductor manufacturers still need to ensure high yields with maximum accuracy.

Because of this need, high-end AOI systems must be precise, stable, and reliable enough to be integrated with the most demanding parts of the semiconductor manufacturing process. These areas include the front-end wafer, where AOI can perform high-precision pattern defect detection and micro-particle identification on the wafer surface before packaging. In the packaging process, AOI is able to execute precise micro-bump alignment and complex 3D structure reconstruction for Chip-on-Wafer-on-Substrate (CoWoS) and Chiplets, both high-density packages. And in its core area of inspection, AOI is able to target power semiconductors like SiC and GaN with reliability high enough for even the most demanding applications, including Electric Vehicles that much meet a “Zero Defect" standard.

This is a very high bar to reach, with no margin for errors in the most critical of applications, so there are many challenges for AOI systems to overcome. Cameras are ever more complex, offering high resolutions and frame rates that result in massive data volumes, which are necessary for accuracy and validation. Meanwhile, Traditional industrial PCs are unable to meet the required throughput or bandwidth for truly high-end AOI systems.

To meet these needs and overcome these challenges, some experts are saying a shift must be made, moving to server-grade computing architecture for AOI solutions that can enable sub-2nm precision and multi-lens (up to 6-sided) inspection, in addition to other key capabilities.

The shift from IPC to server-grade computing will offer several benefits for AOI use cases and implementations while meeting the processing needs for the next generation of computer vision applications. The first requirement is for ultra-high bandwidth of more than 100 Gbps per system. This is out of reach for most ICP systems, and once it’s in place, it offers the benefit of offering bandwidth for other systems during off-peak times. Server-grade systems also more easily handle the rigorous computing needs for real-time Edge AI tools for defect classification and multi-camera synchronization.

Although IPC has always offered what’s required for industrial compute, the newest technologies are going to need more than IPC can do, especially in the realm of computer vision. In particular, IPC suffers from insufficient PCIe lanes, while narrower bandwidth leads to bandwidth contention, which leads to data loss and system instability. These problems are becoming mission-critical faults in modern AOI applications.

There are signs, too, that the semiconductor industry is seeing this shift and making changes to get ready. The adoption of CoaXPress and CoaXPress-over-Fiber (CXPoF) indicates the recognition of the need for high-speed image data transfers, and single-frame grabber bandwidth expansions are also happening, expanding speeds up to the 100 Gbps requirement.

The advantages offered through server-grade architectures are hard to look past. Engineers can make use of more than 100 PCIe lanes, double-digit expansion slots, and “two systems in one” consolidation, while also enjoying simpler deployment and reduced footprint.

With all that said, server-grade AOI systems are not without their own challenges. System integration is the first hurdle to be considered. There are system compatibility risks from introducing multi-GPU and multi-frame grabber environments into legacy infrastructure that can create conflicts like card detection failures, PCIe bandwidth misallocation, and unexpected disconnections. These are usually caused by a lack of BIOS-level optimization and system validation.

In addition, in high-end AOI inspection systems, power stability can be a major concern. The base power consumption of a server-grade system is at least 1000W, but high-end GPUs can trigger a 200 percent rated power peak. This kind of power spike during high-load AI processing and instantaneous power consumption can be up to 600W per high-end GPU. If the system is ready for this, users can see voltage drops due to insufficient transient response, digital signal distortion in both frame grabbers and GPUs, and a quite high risk of unexpected system reboots. The main strategies for ameliorating these issues are to:

  • Follow strictly to PCIe Gen 5.0 ATX 3.1 specifications
  • Provide extreme transient support that’s optimized to handle 1.5x to 2x power peaks
  • Ensure consistent voltage output during maximum demand

These high-voltage systems also need to make use of up-to-date thermal solutions to handle the high temperature conditions to avoid thermal saturation and performance degradation. They require dense, high-power cards in a 4U chassis that can create thermal dead zones with heat enough to trigger thermal throttling and inconsistent inspection cycle times. For this problem, AOI systems have to follow best practices in thermal strategy:

  • Thermal Design must ensure zero throttling under heavy AI workloads
  • Reliable and stable operation in 30°C–35°C environments

ADLINK Server-Grade ISB-W890 Platform

ADLINK is leading the way in offering solutions to semiconductor manufacturers looking to make the transition to server-grade AOI systems. The ADLINK ISB-W890 Server-Grade Platform is part of the company’s AXE family and is designed for massive data flows via independent bandwidth for PCIe slots:

  • Built-in 11 PCIe expansion slots supporting a total of 128 PCIe lanes, with support for up to 3x full-size x16 GPU cards

  • All PCIe lanes route directly to the CPU, ensuring the shortest path for data writing to CPU cache and minimizing transmission latency between acquisition and AI analysis
  • The ATX 3.1 Specification fully supports instantaneous extreme power demands, ensuring system stability during full-speed AI computation
  • Multiple MCIO groups, 10x USB, 5x COM ports, and a dedicated carrier board able to add 2x PCIe x4 and 2x PCIe x8 slots

ADLINK also understands that in semiconductors, speed equals throughput, and precision is the secret to high yields. These facts outline the need for a variety in frame grabbers, and also pre-validated combinations usable in several use cases. ADLINK’s high-end grabbers feature Direct Memory Access (DMA) engines that bypass the CPU to write image data directly to system memory or the GPU. This “CPU offloading” ensures that 100 percent of available computing power is dedicated to the most important job: defect detection. Integrations are pre-validated and pre-tested on the ISB-W890 platform for PCIe signal integrity, power distribution, and driver compatibility. ADLINK has also pre-validated several common combinations, including:

  • CoaXPress (Euresys Coaxlink Series): Provides up to 100Gb bandwidth per card, ideal for wafer surface defects and large-area panel inspection
  • Camera Link (PCIe-CPL64V Full): Offers ultra-stable real-time transmission with zero CPU load, ideal for delay-sensitive real-time alignment and high-speed component sorting

The server-grade architecture shift is already here, and the semiconductor manufacturers that want to stay ahead of the curve and offer the most powerful solutions to their customers are going to want to look at how to make that shift sooner, rather than later. ADLINK is ready to help.

Additional Resources:

Ken Briodagh is a writer and editor with two decades of experience under his belt. He is in love with technology and if he had his druthers, he would beta test everything from shoe phones to flying cars.

At Embedded Computing Design, he covers, AI, Edge Computing, Data Centers, Automotive, Industrial, Smart City, IoT and IIoT, Semiconductors, Healthcare, and lots more. He hosts weekly programs on YouTube, including the technology unboxing feature DevKit Weekly, and his news show ICYMI, and, along with Tiera Oliver, hosts the Embedded Insiders and Embedded Executive podcasts. 

In previous lives, he’s been a short order cook, telemarketer, medical supply technician, mover of the bodies at a funeral home, pirate, poet, partial alliterist, parent, partner and pretender to various thrones. Most of his exploits are either exaggerated or blatantly false.

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