Renesas Announces Automotive Multi-Domain SoC Built with 3-nm Process Technology

By Tiera Oliver

Associate Editor

Embedded Computing Design

November 25, 2024

News

Renesas Announces Automotive Multi-Domain SoC Built with 3-nm Process Technology

MUNICH, Germany and TOKYO, Japan ― Renesas Electronics Corporation launched the new generation of automotive fusion system-on-chips (SoCs), serving multiple automotive domains including Advanced Driver Assistance Systems (ADAS), in-vehicle infotainment (IVI), and gateway applications on a single chip.

Built using the latest 3-nanometer (nm) automotive process technology, the R-Car X5H SoC, which is the first device in the R-Car X5 series, according to the company offers the highest level of integration and performance in the industry, allowing OEMs and Tier 1s to shift to centralized Electronic Control Units (ECUs) for streamlined development and future-proof system solutions.

Per the company, Renesas’ R-Car X5H is among the first in the industry to offer highly-integrated, secure processing solutions on a single chip for multiple automotive domains, thanks to its unique hardware-based isolation technology. Additionally, the new SoC offers the option to expand AI and graphics processing performance using chiplet techn

The R-Car X5H is designed to address the growing complexity of Software-Defined Vehicle (SDV) development. These challenges include optimizing compute performance, power consumption, cost, hardware, and software integration – while ensuring vehicle safety. By tightly coupling application processing, real-time processing, GPU and AI compute, large display capabilities, and sensor connectivity on a single chip, these devices enable a new class of automated driving, IVI and gateway applications. 

The new SoC series enables AI acceleration of up to 400 TOPS with industry-leading TOPS/W performance and GPU processing of up to 4 TFLOPS*¹. It incorporates a total of 32 Arm® Cortex®-A720AE CPU cores for application processing, delivering over 1,000K DMIPS performance; and six Arm Cortex-R52 dual lockstep CPU cores delivering over 60K DMIPS performance with support for ASIL D capabilities without external microcontrollers (MCUs). Manufactured using one of TSMC’s most advanced process nodes, the new SoC series achieves both top-end CPU performance and a 30-35 percent reduction in power consumption*² compared to devices designed for a 5-nm process node. 

While the R-Car Gen 5 SoCs come with native NPU and GPU processing engines, Renesas is offering customers the ability to scale up their performance through chiplet extensions. When combining a 400-TOPS on-chip NPU with an external NPU via a chiplet extension, for example, it’s possible to scale their AI processing performance by three to four times or more.

For seamless chiplet integration, the R-Car X5H offers the standard UCle (Universal Chiplet Interconnect Express) die-to-die interconnect and APIs, facilitating interoperability with other components in a multi-die system, even if they are non-Renesas chips. This flexible design approach allows car OEMs and Tier 1s to mix and match different functions and customize their systems including future upgrades across vehicle platforms. 

While other SoCs rely solely on software-based isolation, the R-Car X5H SoC also offers hardware-based Freedom from Interference (FFI) technology. This hardware design implementation is designed to securely isolate safety-critical functions, such as brake-by-wire, from non-critical functions. Functions deemed safety critical can be assigned their own separate, redundant domains, each having its own independent CPU core, memory, and interfaces, thus preventing potentially catastrophic vehicle failures in the event of a hardware or software fault from a different domain. The R-Car X5H also comes with Quality of Service (QoS) management that determines workload priorities and assigns processing resources in real-time.  

Renesas’ R-Car Gen 5 is designed to support the broadest range of processing requirements in the industry – from zonal ECUs to high-end central compute, serving from entry-level vehicles to luxury-class models. Thanks to a new unified hardware architecture based on Arm CPU cores, R-Car Gen 5 developers can reuse the same software, tools, and applications from Renesas’ line of new 64-bit SoCs and future products including crossover 32-bit MCUs and automotive 32-bit MCUs. As part of the R-Car next-generation family, Renesas is extending its vehicle control portfolio with a new R-Car MCU series, which will be also powered by Arm. Renesas plans to sample the new 32-bit MCU series with enhanced security for body and chassis applications in Q1/2025. 

Renesas’ latest R-Car X5H and all future Gen 5 products are designed to accelerate SDV development by combining hardware and software into a comprehensive development platform. The newly launched R-Car Open Access (RoX) SDV platform integrates all essential hardware, operating systems (OS), software, and tools needed for automotive developers to develop next-generation vehicles with secure and continuous software updates. RoX provides OEMs and Tier-1 suppliers the flexibility to virtually design a broad range of scalable compute solutions for ADAS, IVI, gateway, and cross-domain fusion systems as well as body control, domain, and zone control systems. 

The R-Car X5H will be sampling to select automotive customers in 1H/2025, with production scheduled in 2H/2027. 

For more information, visit: https://www.renesas.com/en/products/automotive-products/automotive-system-chips-socs

*¹Equivalent TFLOPS based on data from Manhattan 3.1 industry benchmarks. 

*² Data is based on Renesas’ design implementation.  

Tiera Oliver, Associate Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She also assists with newsletter updates as well as contributing and editing content for ECD podcasts and the ECD YouTube channel. Before working at ECD, Tiera graduated from Northern Arizona University where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student led newspaper, The Lumberjack.

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